This is an Engineering position for High Speed Interconnect Products (HSIP). Broadcom has the most extensive physical layer product portfolio in the industry including 800 Gigabit Ethernet Copper and Optical PHYs, Backplane SerDes, and Optical Transport. Broadcom's proven PHY technology offers lower power with a smaller footprint, as well as proven interoperability and ad

Lead end to end planning and execution of events (large and small) in support of business goals and priorities. Manage pre event planning event goals, scope, budget, theme, content plan, timelines, speakers, venue and space needs, exhibit plan, staffing, external vendor management, etc. Engage key division stakeholders at start of planning process to define event strategy

PRINCIPLE CONSULTANT Overview A senior individual of the highest technical skill and experience in workload automation. Displaying a broad range of disciplines, environments, and applications within the workload automation discipline; or, the individual may possess unique skills and highly technical experience in a narrow field of specific workload automation software, th

Drive adoption of Broadcom Software solutions at customer sites When requested by support management, provide on site and remote assistance for the assigned products. Representing development when on site assistance is required. Provide feedback to the value stream to assist with product, development, marketing, and quality of the solutions. Provide feedback to product ma

Works closely with R&D development teams to maximise the value delivered to the customers Understands how the Enterprise backlog model operates with Epics, Capabilities, Features, and Stories Effectively communicate with both internal and external stakeholders Establishes, prioritises, and helps sequence backlog items based on defined strategies, events, and dependencies

Job Description We are currently seeking an experienced ASIC Design Engineer with a strong focus on PCIe protocol, particularly in its physical layer. The ideal candidate will possess comprehensive system level knowledge of PCIe, backed by hands on experience in silicon bring up and debugging involving the PCIe protocol. A robust background in ASIC design and proficiency